74ALVT162821DGG

20-bit bus interface D-type flip-flop; positive?-?edge trigger with 30 Ohm termination resistors; 3?-?state

The 74ALVT162821 is a 20??-??bit positive?-?edge triggered D?-?type flip?-?flop with 30 ? termination resistors and 3?-?state outputs

The device can be used as two 10?-?bit flip?-?flops or one 20?-?bit flip?-?flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 10?-?bits. The flip?-?flops will store the state of their individual D?-?inputs that meet the set?-?up and hold time requirements on the LOW?-?to?-?HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high?-?impedance OFF?-?state. Operation of the nOE input does not affect the state of the flip?-?flops. Bus hold data inputs eliminate the need for external pull?-?up resistors to define unused inputs

Features and benefits

Wide supply voltage range from 2.3 V to 3.6 V
Overvoltage tolerant inputs to 5.5 V
BiCMOS high speed and output drive
Outputs include series resistance of 30 ? making external termination resistors unnecessary
No bus current loading when output is tied to 5 V bus
Direct interface with TTL levels
I_OFF circuitry provides partial Power-down mode operation
20-bit positive-edge triggered register
5 V I/O compatible
Multiple V_CC and GND pins minimize switching noise
Bus hold on data inputs
Live insertion and extraction permitted
Power-up reset
Power-up 3-state
Output capability: +12 mA and -12 mA
Latch-up protection:
- JESD17: exceeds 500 mA
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to 85 °C

參數(shù)類型

型號	V_CC (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	f_max (MHz)	Power dissipation considerations	T_amb (°C)	Package name
74ALVT162821DGG	2.3?-?3.6	TTL	± 12	3.2	150	medium	-40~85	TSSOP56

封裝

型號	可訂購的器件編號，（訂購碼(12NC)）	狀態(tài)	標(biāo)示	封裝	外形圖	回流焊/波峰焊	包裝
74ALVT162821DGG	74ALVT162821DGG:11 (935255460118)	Active	ALVT162821	TSSOP56 (SOT364-1)	SOT364-1	SSOP-TSSOP-VSO-WAVE	SOT364-1_118

環(huán)境信息

型號	可訂購的器件編號	化學(xué)成分	RoHS	RHF指示符
74ALVT162821DGG	74ALVT162821DGG:11	74ALVT162821DGG

品質(zhì)及可靠性免責(zé)聲明

Series

文檔 (9)

文件名稱	標(biāo)題	類型	日期
74ALVT162821	20-bit bus interface D-type flip-flop; positive?-?edge trigger with 30?? termination resistors; 3?-?state	Data sheet	2024-06-25
SOT364-1	3D model for products with SOT364-1 package	Design support	2020-01-22
alvt162821	alvt162821 IBIS model	IBIS model	2013-04-08
Nexperia_package_poster	Nexperia package poster	Leaflet	2020-05-15
SOT364-1	plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body	Package information	2022-06-23
SOT364-1_118	TSSOP56; Reel pack for SMD, 13"; Q1/T1 product orientation	Packing information	2020-04-21
74ALVT162821DGG_Nexperia_Product_Reliability	74ALVT162821DGG Nexperia Product Reliability	Quality document	2024-06-16
alvt16	alvt16 Spice model	SPICE model	2013-05-07
SSOP-TSSOP-VSO-WAVE	Footprint for wave soldering	Wave soldering	2009-10-08

支持

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模型

文件名稱	標(biāo)題	類型	日期
alvt162821	alvt162821 IBIS model	IBIS model	2013-04-08
alvt16	alvt16 Spice model	SPICE model	2013-05-07
SOT364-1	3D model for products with SOT364-1 package	Design support	2020-01-22

訂購、定價與供貨

型號	Orderable part number	Ordering code (12NC)	狀態(tài)	包裝	Packing Quantity	在線購買
74ALVT162821DGG	74ALVT162821DGG:11	935255460118	Active	SOT364-1_118	2,000	訂單產(chǎn)品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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