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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74HC73D-Q100

Dual JK flip-flop with reset; negative-edge trigger

The 74HC73-Q100 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • CMOS low-power dissipation

  • Wide supply voltage range from 2.0 to 6.0 V
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Package name
74HC73D-Q100 2.0?-?6.0 CMOS ± 5.2 16 77 low -40~125 SO14

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74HC73D-Q100 74HC73D-Q100J
(935691123118)
Active 74HC73D SOT108-1
SO14
(SOT108-1)
SOT108-1 SO-SOJ-REFLOW
SO-SOJ-WAVE
WAVE_BG-BD-1
SOT108-1_118

環(huán)境信息

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74HC73D-Q100 74HC73D-Q100J 74HC73D-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (11)

文件名稱 標(biāo)題 類型 日期
74HC73_Q100 Dual JK flip-flop with reset; negative-edge trigger Data sheet 2024-03-26
SOT108-1 3D model for products with SOT108-1 package Design support 2020-01-22
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SO14_SOT108-1_mk plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body Marcom graphics 2017-01-28
SOT108-1 plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm body Package information 2023-11-07
SOT108-1_118 SO14; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2024-02-19
74HC73D-Q100_Nexperia_Product_Reliability 74HC73D-Q100 Nexperia Product Reliability Quality document 2024-06-16
SO-SOJ-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
HCT_USER_GUIDE HC/T User Guide User manual 1997-10-31
SO-SOJ-WAVE Footprint for wave soldering Wave soldering 2009-10-08
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

支持

如果您需要設(shè)計/技術(shù)支持,請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
SOT108-1 3D model for products with SOT108-1 package Design support 2020-01-22

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74HC73D-Q100 74HC73D-Q100J 935691123118 Active SOT108-1_118 2,500 訂單產(chǎn)品

樣品

作為 Nexperia 的客戶,您可以通過我們的銷售機(jī)構(gòu)訂購樣品。

如果您沒有 Nexperia 的直接賬戶,我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74HC73D-Q100 74HC73D-Q100J 935691123118 SOT108-1 訂單產(chǎn)品
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