可訂購(gòu)部件
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷(xiāo)商處購(gòu)買(mǎi) |
|---|---|---|---|---|
| 74LVC1G79GM | 74LVC1G79GM,115 | 935277198115 | SOT886 | 訂單產(chǎn)品 |
| 74LVC1G79GM | 74LVC1G79GM,132 | 935277198132 | SOT886 | 訂單產(chǎn)品 |
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Click here for more information74LVC1G79GM
Single D-type flip-flop; positive-edge trigger
The 74LVC1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
±24 mA output drive (VCC = 3.0 V)
Direct interface with TTL levels
Latch-up performance exceeds 250 mA
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74LVC1G79GM | 1.65?-?5.5 | CMOS/LVTTL | ± 32 | 2.2 | 450 | low | -40~125 | XSON6 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC1G79GM | 74LVC1G79GM,115 (935277198115) |
Active | VP |
XSON6 (SOT886) |
SOT886 |
REFLOW_BG-BD-1
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SOT886_115 |
| 74LVC1G79GM,132 (935277198132) |
Active | VP | SOT886_132 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC1G79GM | 74LVC1G79GM,115 | 74LVC1G79GM |
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| 74LVC1G79GM | 74LVC1G79GM,132 | 74LVC1G79GM |
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Series
文檔 (16)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC1G79 | Single D-type flip-flop; positive-edge trigger | Data sheet | 2023-08-18 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT886 | 3D model for products with SOT886 package | Design support | 2019-10-03 |
| lvc1g79 | 74LVC1G79 IBIS model | IBIS model | 2014-10-20 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DFN1410-6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| XSON6_SOT886_mk | plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| SOT886 | plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body | Package information | 2022-06-01 |
| SOT886_115 | XSON6; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| SOT886_132 | XSON6; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2020-04-21 |
| 74LVC1G79GM_Nexperia_Product_Reliability | 74LVC1G79GM Nexperia Product Reliability | Quality document | 2024-06-16 |
| REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
| lvc | lvc Spice model | SPICE model | 2013-05-07 |
| MAR_SOT886 | MAR_SOT886 Topmark | Top marking | 2013-06-03 |
支持
如果您需要設(shè)計(jì)/技術(shù)支持，請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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訂購(gòu)、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買(mǎi) |
|---|---|---|---|---|---|---|
| 74LVC1G79GM | 74LVC1G79GM,115 | 935277198115 | Active | SOT886_115 | 5,000 | 訂單產(chǎn)品 |
| 74LVC1G79GM | 74LVC1G79GM,132 | 935277198132 | Active | SOT886_132 | 5,000 | 訂單產(chǎn)品 |
樣品
作為 Nexperia 的客戶，您可以通過(guò)我們的銷(xiāo)售機(jī)構(gòu)訂購(gòu)樣品。
如果您沒(méi)有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷(xiāo)商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷(xiāo)商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVC1G79GM
Single D-type flip-flop; positive-edge trigger
從安世半導(dǎo)體購(gòu)買(mǎi)
| SKU | 庫(kù)存* | MOQ | 單位價(jià)格 | 數(shù)量 |
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