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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車(chē)應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LVT16646ADGG

3.3 V 16-bit bus transceiver; 3-state

The 74LVT16646A is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The control function implementation minimizes external timing requirements. The device features an output enable (OE) input for easy cascading and a direction (DIR) input for direction control.

Data on bus A or bus B is clocked into the registers on the LOW-to-HIGH transition of the appropriate clock (CPAB or CPBA). The select control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode data).

此產(chǎn)品已停產(chǎn)

Features and benefits

  • 16-bit universal bus interface
  • 3-state buffers
  • Output capability: from +64 mA to -32 mA
  • TTL input and output switching levels
  • Input and output interface capability to systems at 5 V supply
  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
  • Live insertion and extraction permitted
  • No bus-current loading when output is tied to 5 V bus
  • Power-up reset
  • Power-up 3-state
  • Latch-up protection exceeds 500 mA per JESD78
  • ESD protection:
    • MIL STD 883 Method 3 015: exceeds 2000 V
    • Machine model: exceeds 200 V

Applications

參數(shù)類(lèi)型

型號(hào) Package name
74LVT16646ADGG TSSOP56

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LVT16646ADGG 74LVT16646ADGG,112
(935204690112)
Obsolete LVT16646A Standard Procedure Standard Procedure SOT364-1
TSSOP56
(SOT364-1)
SOT364-1 SSOP-TSSOP-VSO-WAVE
暫無(wú)信息
74LVT16646ADGG,118
(935204690118)
Obsolete LVT16646A Standard Procedure Standard Procedure SOT364-1_118
74LVT16646ADGGS
(935204690512)
Obsolete LVT16646A Standard Procedure Standard Procedure 暫無(wú)信息
74LVT16646ADGGY
(935204690518)
Obsolete LVT16646A Standard Procedure Standard Procedure 暫無(wú)信息

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LVT16646ADGG 74LVT16646ADGG,112 74LVT16646ADGG rohs rhf rhf
74LVT16646ADGG 74LVT16646ADGG,118 74LVT16646ADGG rohs rhf rhf
74LVT16646ADGG 74LVT16646ADGGS 74LVT16646ADGG rohs rhf rhf
74LVT16646ADGG 74LVT16646ADGGY 74LVT16646ADGG rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (7)

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
74LVT16646A 3.3 V 16-bit bus transceiver; 3-state Data sheet 2005-01-11
SOT364-1 3D model for products with SOT364-1 package Design support 2020-01-22
lvt16646a lvt16646a IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT364-1 plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body Package information 2022-06-23
lvt16 lvt16 Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
lvt16646a lvt16646a IBIS model IBIS model 2013-04-09
lvt16 lvt16 Spice model SPICE model 2013-05-07
SOT364-1 3D model for products with SOT364-1 package Design support 2020-01-22

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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