外形圖
| 封裝版本 | 封裝名稱 | 封裝說明 | 參考 | 發(fā)行日期 |
|---|---|---|---|---|
| SOT364-1 | TSSOP56 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | MO-153 (JEDEC) | 2003-02-19 |
相關(guān)文檔
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT364-1 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | Package information | 2022-06-23 |
| SOT364-1_118 | TSSOP56; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
采用此封裝的產(chǎn)品
Analog & Logic ICs
| 型號(hào) | 描述 | 快速訪問 |
|---|---|---|
| 74ALVCH16500DGG | 18-bit universal bus transceiver; 3-state | |
| 74ALVCH16827DGG | 20-bit buffer/line driver, non-inverting; 3-state | |
| 74ALVCH16646DGG | 16-bit bus transceiver/register; 3-state | |
| 74ALVT16827DGG | 20-bit buffer/line driver; non-inverting; 3-state | |
| 74ALVCH16543DGG | 16-bit D-type registered transceiver; 3-state | |
| 74ALVCH16501DGG | 18-bit universal bus transceiver; 3-state | |
| 74ALVCH16652DGG | 16-bit transceiver/register with dual enable; 3-state | |
| 74ALVCH162827DGG | 20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state | |
| 74ALVCH16601DGG | 18-bit universal bus transceiver; 3-state | |
| 74ALVCH16825DGG | 18-bit buffer/driver; 3-state | |
| 74ALVT162821DGG | 20-bit bus interface D-type flip-flop; positive?-?edge trigger with 30 Ohm termination resistors; 3?-?state | |
| 74ALVCH162601DGG | 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state | |
| 74ALVCH16843DGG | 18-bit bus-interface D-type latch; 3-State | |
| 74ALVCH16600DGG | 18-bit universal bus transceiver; 3-state | |
| 74ALVT162827DGG | 20-bit buffer/line driver; non-inverting; with 30 Ohm?termination resistors;?3-state | |
| 74ALVCH16821DGG | 20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state | |
| 74ALVCH16823DGG | 18-bit bus-interface D-type flip-flop with reset and enable; 3-state | |
| 74ALVT16821DGG | 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state | |
| 74ALVT162823DGG | 18-bit bus-interface D-type flip-flop with reset and enable with 30 Ohm termination resistors; 3-state | |
| 74ALVT16823DGG | 18-bit bus-interface D-type flip-flop with reset and enable; 3?-?state | |
| 74AVCH20T245DGG | 20-bit dual supply translating transceiver with configurable voltage translation; 3-state | |
| 74AVC20T245DGG | 20-bit dual supply translating transceiver with configurable voltage translation; 3-state | |
| 74ALVCH16952DGG | 16-bit registered transceiver; 3-state | |
| 74LVT16543ADGG | 3.3 V 16-bit registered transceiver; 3-state | |
| 74ALVCH16841DGG | 20-bit bus interface D-type latch; 3-state |